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74LVT02PW技术文档下载：
74LVT02PW产品应用图解：
74LVT02PW - 3.3 V四路2输入或非门
74LVT02PW是NXP公司的一款或非门产品，74LVT02PW是3.3 V四路2输入或非门，本站介绍了74LVT02PW的封装应用图解、特点和优点、功能等，并给出了与74LVT02PW相关的NXP元器件型号供参考。
74LVT02PW - 3.3 V四路2输入或非门 - 或非门 - 门 - 恩智浦, LLC
产品描述
The 74LVT02 is a quad 2-input NOR gate. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
产品特性和优势
- Wide supply voltage range from 2.7 V to 3.6 V
- Overvoltage tolerant inputs to 5.5 V
- BiCMOS high speed and output drive
- Direct interface with TTL levels
- IOFF circuitry provides partial Power-down mode operation
- Latch-up performance exceeds 500 mA per JESD 78 Class II Level B
- Complies with JEDEC standards:
- JESD8C (2.7 V to 3.6 V)
- ESD protection:
- HBM EIA/JESD22-A114-A exceeds 2000?V
- MM EIA/JESD22-A115-A exceeds 200?V
- Specified from -40?°C to 85?°C
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