CBTV24DD12ET - 12-bit bus switch/multiplexer for DDR4-DDR3-DDR2 applications

CBTV24DD12ET是NXP恩智浦公司的一款存储器数据开关产品，CBTV24DD12ET是12-bit bus switch/multiplexer for DDR4-DDR3-DDR2 applications，本站介绍了CBTV24DD12ET的封装应用图解、特点和优点、功能等，并给出了与CBTV24DD12ET相关的NXP元器件型号供参考。

CBTV24DD12ET - 12-bit bus switch/multiplexer for DDR4-DDR3-DDR2 applications - 存储器数据开关 - 接口与连接性 - 恩智浦

产品描述

The CBTV24DD12 is designed for 1.8 V / 2.5 V / 3.3 V supply voltage operation and itsupports Pseudo Open Drain (POD), SSTL_12, SSTL_15 or SSTL_18 signaling and CMOS selectinput levels. This device is designed for operation in DDR4, DDR3 or DDR2 memory bussystems, with speeds up to 3200 MT/s.

The CBTV24DD12 has a 1:2 switch or 2:1 multiplex topology and offers a 12-bit wide bus.Each 12-bit wide A-port can be switched to one of two ports B and C, for all bitssimultaneously. Each port is non-directional due to the use of FET switches, allowing amultitude of applications requiring high-bandwidth switching or multiplexing.

The selection of the port is by a simple CMOS input (SELect). Another CMOS input (ENable) is available to allow all ports to bedisconnected. The SEL0, SEL1 and EN input signals aredesigned to operate transparently as CMOS input level signals up to 3.3 V. TheCBTV24DD12 uses NXP’s proprietary high-speed switch architecture providing highbandwidth, very little insertion loss, return loss, and very low propagation delay,allowing use in many applications requiring switching or multiplexing of high-speedsignals. It is available in a 3.0 mm × 8.0 mm TFBGA48 package with 0.65 mm ball pitch,for optimal size versus board layout density considerations. It is characterized foroperation from -10 °C to +85 °C.

产品特性和优势

Topology

12-bit bus width
1:2 switch/MUX topology
Bidirectional operation
Simple CMOS select pins (SEL0, SEL1)
Simple CMOS enable pin (EN)

Performance

3200 MT/s throughput
7.4 GHz bandwidth (for both single-ended and differential signals)
Low ON insertion loss
Low return loss
Low crosstalk
High OFF isolation
POD_12, SSTL_12, SSTL_15 or SSTL_18 signaling
Low RON (8 ? typical)
Low ΔRON (<1 ?)

General attributes

1.8 V / 2.5 V / 3.3 V supply voltage operation
Very low supply current (600 μA typical)
ESD robustness exceeds 2.5 kV HBM, 1 kV CDM
Available in TFBGA48 package, 3.0 mm × 8.0 mm × 1.0 mm size, 0.65 mm pitch,Pb-free/Dark Green

产品应用

DDR4/DDR3/DDR2 memory bus systems
NVDIMM module
Systems requiring high-speed multiplexing
Flash memory array subsystem

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